本研究使用硬度70Hv與40Hv兩種IC金凸塊，分別與目前最細小之3um導電粒子進行高解析度顯示器模組之構裝，探討導通粒子與金凸塊硬度對導通阻抗之影響，以便獲得較佳之製程條件。為能對高解析度顯示器模組之導通阻抗有更完整之分析，本研究亦建立一新的串聯導通模型，並以實驗比較構裝後理論與實際阻抗值的差異。 在積體電路之金凸塊與玻璃基板之ITO介面接合技術上，金凸塊在初期施壓過程中扮演支撐與壓破導電粒子的角色，特別是對目前IC晶圓廠具有環狀城牆結構之製造技術。一般而言，較高硬度的金凸塊可以獲得較多有效的導通粒子與低阻抗值，較低硬度之金凸塊則在加大壓力後才可獲得較佳之低阻抗值。本研究發現3um之導電粒子在構裝製程上之導通阻抗約為0.5歐姆。3um之導電粒子與硬度70Hv之金凸塊構裝後之阻抗值遠比顯示器之ITO走線阻抗值來的低，因此使用3um之導電粒子與硬度70Hv之金凸塊於高析度顯示器的構裝上，將具有微小化與縮減成本之優勢。 In this research, dependency of the hardness of the IC gold bump and the properties of the conducting particle on the conducting resistance of the high resolution flat panel display packaging was investigated. Two kinds of IC gold bumps with material hardness 70Hv and 40Hv, respectively, and the currently smallest 3um conducting particle made by Sony Inc. were used to conduct the experiments. To have deep investigation of the equivalent resistance, a novel resistance model based on the series resistance concept was proposed. Experiments were designed and carried out to distinguish the deviations of the theoretical and the actual impedance. During the initial loading period of the flat panel display packaging, the IC gold bump acts as both a brace and a breaker for the conducting particle. It is more appropriate for the IC fabrication process that has a ring structure as the wall. In general, a harder gold bump should obtain more effective conducting particles and possesses lower impedance. A gold bump with less hardness becomes more conductive when an external loading is applied. For the experimental results in this research, it was found that the impedance of the 3um conducting particle used in the flat panel display packaging is 0.5 ohm. The combined impedance of the 3um conducting particle and the IC gold bump with hardness 70Hv after bonding is far less than that of the ITO layout. It can be concluded that the 3um conducting particle and the IC gold bump with hardness 70Hv together can lead to a miniaturized device with less cost.