本論文旨在探討24GHz射頻接收機之前端電路設計，內容大約共分為五個部份：首先對無線射頻系統做簡介，並介紹本論文使用之24GHz頻帶於業界之應用；接著介紹低雜訊放大器之基本理論與實驗晶片設計成果；然後介紹混頻器基本理論與實驗晶片設計成果；在實作晶片過程並非皆很順遂，緊接著再探討兩顆晶片失敗的原因，其中第一顆是24GHz兩級架構低雜訊放大器，第二顆是低雜訊放大器、主動式Balun及混頻器三者組合成的24GHz射頻接收機之前端電路。最後，作ㄧ概括性的回顧及結論。 This thesis presents front-end circuits design for 24GHz radio-frequency receiver. It is composed of five chapters. At first, a brief introduction of wireless radio- frequency system and the applications of 24GHz frequency band in industry are introduced. Then, we discuss the basic theories of the low noise amplifier (LNA) and the measured results of an implemented LNA chip. Following the LNA, the basic theories of the mixer and the implemented mixer chip are introduced. In the process of our study, we are not successful all the way. Therefore, we discuss the possible reasons of two failed ICs: the first on is a low noise amplifier for 24GHz applications, while the second one is front-end circuits design for 24GHz radio-frequency receiver, which includes a low noise amplifier, an active balun, and the mixer. Finally, a general review is drawn.